Optimization of Low-Resistance State performance in Ge-rich GST phase change memory

In this paper, we propose a novel programming technique, named R-SET pulse, in order to optimize the Low-Resistance State (LRS) performance of Ge-rich phase change materials by overcoming the decrease of crystallization speed caused by Ge enrichment of Ge₂Sb₂Te₅. The R-SET pulse is capable of bringing the cell to its LRS at a lower switching threshold voltage than in the case of conventional programming pulses, thus protecting the cell from potential current overshoots during switching. The functionality of the circuit conceived to generate the R-SET pulse, which operates on a time reference scheme, is discussed. Simulations highlight the tunability of the produced R-SET pulse characteristics.