A 1.2V low-power high-resolution noise-shaping ADC using multistage time encoding converters for biomedical applications

The high-resolution and low power consumption ADCs demand in read-out circuits for biopotential systems has been increased in the last few years. This paper presents a new architecture to implement this kind of ADC´s using multistage time encoding converters. Due to the low voltage supply and low power demanded on this type of applications, the proposed ADC is formed by a second-order multibit noise-shaping converter using a time domain integrating quantizer as first stage and a Differential Gated-Ring Oscillator (DGRO) as second stage of the multistage architecture (MASH). The first-order noise shaping behavior of the DGRO allows to obtain a total third order noise shaping performance in the final ADC output. Moreover, using the arrangement proposed in this work, the low power requirements demanded in biopotential read-out circuits can be achieved. This because the multi-bit flash quantizer used in standard noise-shaping ADCs has been replaced by a time domain integrating quantizer that uses a one bit comparator and a PWM DAC. In addition the second stage of the MASH structure is used to quantize the width of a digital pulse with the benefit of first order noise shaping. Hence, the combination of a GRO with an integrating quantizer may produce a hardware-efficient multistage ADC (MASH) due to the digital nature of the GRO. As an example, the transistor level performance of a MASH 2-1 ADC with the proposed architecture has been evaluated. The transistor level simulations show that the ADC can achieve an ENOB = 15bits in a signal bandwidth of 16kHz using a 0.18μm CMOS technology at 1.2V.