DocumentCode :
1777689
Title :
Towards the use of functionality-enhanced devices: A transversal design approach
Author :
Gaillardon, Pierre-Emmanuel
Author_Institution :
EPFL (Swiss Fed. Inst. of Technol.), Lausanne, Switzerland
fYear :
2014
fDate :
June 30 2014-July 3 2014
Firstpage :
1
Lastpage :
1
Abstract :
Summary form only given. Exploiting unconventional physical properties, several nanodevices showed an alternative to Moore´s Law by the increase of their functionality rather than the pure scaling. Innovative device behaviors transduce to new circuit/architecture opportunities. Here, we focus on a novel class of computation devices that exhibit controllable-polarity property. At advanced technology nodes, Schottky contacts at channel interfaces are becoming challenging to avoid. Hence, devices face an ambipolar behavior, i.e, that the device exhibits n- and p-type characteristics simultaneously. Such a property is desirable for logic computation. Indeed, it has been recently demonstrated by EPFL that by constructing independent double-gate structures on Vertically stacked nanowires FETs (NWFETs), the device polarity can be electrostatically forced to be either n- or p-type. Controllable-polarity devices are logical bi-conditional on both gate values and enable a compact realization of XOR-based logic functions, which are not implementable in CMOS in a compact form. Hyper regular architectures and new EDA tools are then needed to leverage the intrinsic properties of controllable-polarity devices from an application perspective. In this talk, I will cover the different aspects of the design with controllable-polarity devices ranging from device fabrication to logic synthesis tools, and I will emphasize on the work organization and importance for interdisciplinary teams in the field of emerging technologies.
Keywords :
Schottky barriers; field effect transistors; nanoelectronics; nanowires; EDA tools; EPFL; Moore law; NWFETs; Schottky contacts; XOR-based logic functions; advanced technology nodes; ambipolar behavior; channel interfaces; controllable-polarity devices; controllable-polarity property; device polarity; double-gate structures; functionality-enhanced devices; gate values; hyper regular architectures; innovative device behaviors; logic computation; logical bi-conditional; n-type characteristics; nanodevices; p-type characteristics; transversal design approach; vertically stacked nanowires FETs; Computer architecture; Face; Field effect transistors; Logic gates; Nanoscale devices; Nanowires; Schottky barriers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Ph.D. Research in Microelectronics and Electronics (PRIME), 2014 10th Conference on
Conference_Location :
Grenoble
Type :
conf
DOI :
10.1109/PRIME.2014.6872762
Filename :
6872762
Link To Document :
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