Title :
Aging-aware critical paths in deep submicron
Author :
Alladi, Phaninder ; Tragoudas, Spyros
Author_Institution :
Dept. of Electr. & Comput. Eng., Southern Illinois Univ. Carbondale, Carbondale, IL, USA
Abstract :
Gate delays in a circuit degrade as a function of time due to NBTI. This impacts the set of critical paths that must be tested for delay defects. We propose a method that determines a time period under which the circuit can be tested for delay defects in the presence of NBTI aging.
Keywords :
delays; integrated circuit testing; negative bias temperature instability; NBTI aging; aging-aware critical paths; deep submicron; delay defects; gate delays; time period; Aging; Delays; Integrated circuit modeling; Logic gates; Probability density function; Solid modeling; Stress;
Conference_Titel :
On-Line Testing Symposium (IOLTS), 2014 IEEE 20th International
Conference_Location :
Platja d´Aro, Girona
DOI :
10.1109/IOLTS.2014.6873691
