DocumentCode :
1778422
Title :
Voltage level increment by proposed sub-cell for existing topologies
Author :
Sappati, Santosh Kumar ; Varshney, Amitabh ; Singh, V. ; Gupta, Rajesh
Author_Institution :
Nat. Inst. of Technol., Raipur, India
fYear :
2014
fDate :
20-23 May 2014
Firstpage :
548
Lastpage :
553
Abstract :
This paper proposes and analyses a method that will increase the number of voltage level of any existing topology, only thing is load should be connected across H-bridges. In order to verify the proposed cell, various existing topologies have been simulated and analyzed. The purpose of the circuit proposed is to reduce the use of IGBT switches and hence improving the Total Harmonic Distortion.
Keywords :
harmonic distortion; insulated gate bipolar transistors; invertors; network topology; H-bridges; IGBT switch subcell; power load; total harmonic distortion; voltage level increment; Asia; Equations; Insulated gate bipolar transistors; Inverters; Smart grids; Switches; Topology; Cascaded Inverter; Existing Topologies; Multilevel Inverter;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Innovative Smart Grid Technologies - Asia (ISGT Asia), 2014 IEEE
Conference_Location :
Kuala Lumpur
Type :
conf
DOI :
10.1109/ISGT-Asia.2014.6873851
Filename :
6873851
Link To Document :
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