Bee colony algorithm applied to memory architecture exploration intended for energy reduction

Due to continued growth in the use of embedded systems, such as example smartphones and tablets, and the development of applications involving high-definition video and 3D maps, systems have come to require greater processing power. The fierce development of embedded systems has come to present energy consumption as a problem to be overcome by developers. It is known that the cache memory is responsible for 50% of the total energy in an embedded system, therefore this study presents an improved artificial bee colony algorithm for multi-objective optimization for cache memory hierarchy exploration problems, aiming to reduce the energy consumption and to increase the performance of processes in embedded applications. The architecture exploration was based on cache parameters adjustments inserted on memory hierarchies composed of three levels of cache memory. In the experiments, the proposed algorithm was applied to six different applications from the MiBench and the MediaBenchII suites; and was compared with SPEA2, EDDM and NSGAII optimization mechanisms, previously used for the same type of problem. It was demonstrated that the proposed strategy applied to memory hierarchy exploration problem, obtained better results for the two indicators used in the comparison, hypervolume and the generational distance, in 66.66% of the cases. Furthermore, the method proposed found the best solutions just exploring, in the least satisfactory case, 1.80% of the total space of solutions.