DocumentCode
1778582
Title
CLEVER: Cross-layer error verification, evaluation and reporting
Author
Vivas Maeda, Rafael Kioji ; Sill Torres, Frank
Author_Institution
Sch. of Electr. Eng., Fed. Univ. of Minas Gerais, Belo Horizonte, Brazil
fYear
2014
fDate
1-5 Sept. 2014
Firstpage
1
Lastpage
7
Abstract
The continuously progressing technology scaling is not only the source for increasing performance and complexity of embedded systems, but also the reason for rising reliability concerns of the underlying hardware. Consequently, numerous techniques emerged in recent years to mitigate wide range of error causes. Single layer methods, though, proved to be limited in providing an effective and efficient way to address errors in the system perspective. This paper proposes the new technology Cross-Layer Error Verification, Evaluation and Reporting (CLEVER), which is capable of gathering errors and system information on different levels of abstraction to evaluate the remaining useful lifetime of the system and its current state. Thus, CLEVER permits to overcome errors due to time-dependable and abrupt deterioration effects in complex embedded systems with a reasonable overhead. The presented system architecture was designed using a system description language and integrated in a simulation platform. Simulation results indicate the feasibility of this technology.
Keywords
embedded systems; integrated circuit reliability; multiprocessing systems; remaining life assessment; system-on-chip; CLEVER; complex embedded systems; cross-layer error verification-evaluation and reporting technology; multiple processor system-on-chips; reliability; remaining useful lifetime evaluation; simulation platform; single layer methods; system architecture; system description language; system information; technology scaling; Computer architecture; Embedded systems; Monitoring; Program processors; Random access memory; Reliability; Sensors; Dependable embedded systems; cross-layer; management;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuits and Systems Design (SBCCI), 2014 27th Symposium on
Conference_Location
Aracaju
Type
conf
DOI
10.1145/2660540.2660978
Filename
6994630
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