DocumentCode :
1778584
Title :
Determining cases of scenarios to improve coverage in simulation-based verification
Author :
Shuo Yang ; Wille, Robert ; Drechsler, Rolf
Author_Institution :
Inst. of Comput. Sci., Univ. of Bremen, Bremen, Germany
fYear :
2014
fDate :
1-5 Sept. 2014
Firstpage :
1
Lastpage :
7
Abstract :
Functional verification of complex designs is still dominated by simulation-based approaches. In particular, Coverage-driven Verification (CDV) is well acknowledged and applied in industry. Here, verification gaps in terms of inadequately checked scenarios are addressed and closed by generating and applying dedicated stimuli. In order to ensure a good coverage and, by this, a high verification quality, each scenario is supposed to become sufficiently triggered. However, the considered scenario may be triggered in several fashions and information about that is hardly available in the existing CDV approaches. In this work, we propose an approach which automatically derives this information. Examples and experimental evaluations illustrate how this improves coverage in simulation-based verification.
Keywords :
circuit simulation; integrated circuit design; CDV approaches; complex designs; coverage-driven verification; functional verification; high verification quality; simulation-based verification; Algorithm design and analysis; Boolean functions; Encoding; Multiplexing; Observability; Read only memory; Silicon; Coverage; Simulation-based verification; Stimuli Generation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuits and Systems Design (SBCCI), 2014 27th Symposium on
Conference_Location :
Aracaju
Type :
conf
DOI :
10.1145/2660540.2660979
Filename :
6994631
Link To Document :
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