Reliability analysis of a 130nm charge redistribution SAR ADC under single event effects

Successive Approximation Register (SAR) converters based on charge redistribution are often present in embedded mixed-signal systems. Previous works have shown that this topology is prone to errors on the conversion, caused by Single Event Transients (SET), when exposed to ionizing radiation. Such errors can propagate to the subsequent steps of conversion, leading to multiple bit errors on the converted data. In this work, the effects of SETs on the analog switches and on the digital control logic of a charge redistribution SAR A/D converter are analyzed. A fault injection framework was developed in a way that faults are randomly injected, by means of spice simulations, considering a 130nm CMOS technology. This way, the behavior of the converter under single event effects can be predicted, and the most vulnerable circuit nodes can be identified.