• DocumentCode
    1782958
  • Title

    Design of an FPGA-based full-state feedback controller using high level synthesis tools

  • Author

    Velazquez, R. ; Lucia, O. ; Navarro, D. ; Barragan, L.A. ; Artigas, J.I. ; Sagues, Carlos

  • Author_Institution
    Dept. of Electron. Eng. & Commun., Univ. of Zaragoza, Zaragoza, Spain
  • fYear
    2014
  • fDate
    22-25 June 2014
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Digital control has significantly advanced in the last decade enabling the implementation of higher performance controllers using digital devices such as microcontrollers, DSPs or FPGAs. The design and implementation of controllers using FPGAs is often a challenging and time-consuming task. In order to improve this process, high level synthesis tools allow the use of high-level programming languages, easing the design and simulation process and enabling a straight-forward design space exploration. This paper details the overall design process using high level synthesis tools and presents as a representative example a full-state feedback controller for a buck converter using single-precision floating point representation. The main implementation and experimental results are summarized, highlighting the main benefits and drawbacks of this approach.
  • Keywords
    digital control; field programmable gate arrays; high level languages; high level synthesis; logic design; DSP; FPGA; buck converter; digital control; digital devices; full-state feedback controller; high level synthesis tools; high-level programming languages; microcontrollers; single-precision floating point representation; Computer languages; Conferences; Field programmable gate arrays; High level synthesis; Mathematical model; Power electronics; Vectors; Digital control; Field Programmable Gate Array; Hardware description language; High level synthesis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Control and Modeling for Power Electronics (COMPEL), 2014 IEEE 15th Workshop on
  • Conference_Location
    Santander
  • Type

    conf

  • DOI
    10.1109/COMPEL.2014.6877117
  • Filename
    6877117