Near time optimal PID tuning in a digitally controlled synchronous buck converter

Linear small-signal models often fail to capture underlying behavior of a switching power converter, and use of such models cannot fully explore the performance and stability objectives of a proportional-integral-derivative (PID) controller. This paper proposes a nonlinear PID control tuning method in a synchronous buck converter using phase-plane geometry. The capacitor current replaces direct derivative and provides load current feed-forward along with near load-invariant regulation. A first-order switching surface takes the form of a PD controller, which is tuned during a large-signal recovery with an intent to achieve minimum-time transient recovery. Thereafter an integral action is initiated for eliminating steady-state error with an inherent anti-windup arrangement. The proposed tuning method analytically computes tuning parameters using the information of load step-size, input/ output voltages. The proposed method nearly achieves time optimal transient recovery and ensures large-signal stability. A buck converter prototype is tested, and the proposed algorithm is implemented using an FPGA device.