• DocumentCode
    1783127
  • Title

    Handling input voltage frequency variations in power factor correctors with precalculated duty cycles

  • Author

    Lopez-Colino, Fernando ; Sanchez, Abel ; Alvarez, Gabriel ; de Castro, Angel ; Garrido, Juan

  • Author_Institution
    EPS, Dept. TEC, Human-Comput. Technol. Lab., Univ. Autonoma de Madrid, Madrid, Spain
  • fYear
    2014
  • fDate
    22-25 June 2014
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    The use of precalculated duty cycles for power factor correction leads to a significant simplification of the design and a reduction of the final cost. There are previous proposals for handling non-nominal conditions such as input voltage or load variations. However, there are no proposals for handling input frequency variations, which have an important impact in the power factor. This paper measures this impact and includes a simple loop to handle the variations of the input frequency. The results show that the introduction of this loop keeps the power factor values around those obtained in nominal conditions.
  • Keywords
    field programmable gate arrays; power factor correction; input voltage frequency variations; power factor correctors; precalculated duty cycles; Decision support systems; Electricity; Frequency measurement; Power electronics; Power factor correction; Proposals; Reactive power; FPGA; Frequency robustness; PFC;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Control and Modeling for Power Electronics (COMPEL), 2014 IEEE 15th Workshop on
  • Conference_Location
    Santander
  • Type

    conf

  • DOI
    10.1109/COMPEL.2014.6877202
  • Filename
    6877202