DocumentCode :
1783237
Title :
Energy-Efficient Time-Division Multiplexed Hybrid-Switched NoC for Heterogeneous Multicore Systems
Author :
Jieming Yin ; Pingqiang Zhou ; Sapatnekar, Sachin S. ; Zhai, Antonia
Author_Institution :
Univ. of Minnesota, Twin Cities, Minneapolis, MN, USA
fYear :
2014
fDate :
19-23 May 2014
Firstpage :
293
Lastpage :
303
Abstract :
NoCs are an integral part of modern multicore processors, they must continuously support high-throughput low-latency on-chip data communication under a stringent energy budget when system size scales up. Heterogeneous multicore systems further push the limit of NoC design by integrating cores with diverse performance requirements onto the same die. Traditional packet-switched NoCs, which have the flexibility of connecting diverse computation and storage devices, are facing great challenges to meet the performance requirements within the energy budget due to latency and energy consumption associated with buffering and routing at each router. In this paper, we take advantage of the diversity in performance requirements of on-chip heterogeneous computing devices by designing, implementing, and evaluating a hybrid-switched network that allows the packet-switched and circuit-switched messages to share the same communication fabric by partitioning the network through time-division multiplexing (TDM). In the proposed hybrid-switched network, circuit-switched paths are established along frequently communicating nodes. Our experiments show that utilizing these paths can improve system performance by reducing communication latency and alleviating network congestion. Furthermore, better energy efficiency is achieved by reducing buffering in routers and in turn enabling aggressive power gating.
Keywords :
multiprocessing systems; network-on-chip; TDM; circuit-switched messages; communication fabric; communication latency reduction; energy-efficient time-division multiplexed hybrid-switch; heterogeneous multicore systems; high-throughput low-latency on-chip data communication; network congestion; network-on-chips design; on-chip heterogeneous computing devices; packet-switched NoC; packet-switched messages; performance requirements; power gating; stringent energy budget; Multicore processing; Multiplexing; Ports (Computers); Routing; Switches; Switching circuits; System-on-chip; energy-efficiency; interconnection network;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing Symposium, 2014 IEEE 28th International
Conference_Location :
Phoenix, AZ
ISSN :
1530-2075
Print_ISBN :
978-1-4799-3799-8
Type :
conf
DOI :
10.1109/IPDPS.2014.40
Filename :
6877264
Link To Document :
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