Title :
Charge partitioning scheme for FET models
Author :
Parker, Anthony E. ; Mahon, Simon J.
Author_Institution :
Dept. of Eng., Macquarie Univ., Sydney, NSW, Australia
Abstract :
A field effect transistor channel charge partitioning scheme is proposed that explains small-signal port parameters associated with the source and drain terminals. The scheme starts with the channel charge, that can be readily extracted from measurement, and defines source charge as that for a drainless channel. The drain charge is the difference required for neutrality. This new approach is a contrast to alternative schemes that apportion part of the channel charge to the source. A significant outcome is the insight that the drain and source charges are larger in magnitude than the channel charge. This is an essential requirement for the correct modelling of reactive parameters not associated with the gate, such as drain-source capacitance, transcapacitance, or transconductance delay.
Keywords :
field effect transistors; semiconductor device models; FET models; channel charge; charge partitioning scheme; drain terminals; drain-source capacitance; drainless channel; field effect transistor; reactive parameters; small-signal port parameters; source charge; source terminals; transcapacitance delay; transconductance delay; Capacitance; Capacitance measurement; Field effect transistors; Integrated circuit modeling; Logic gates; Microwave circuits; Voltage control;
Conference_Titel :
European Microwave Integrated Circuit Conference (EuMIC), 2014 9th
Conference_Location :
Rome
DOI :
10.1109/EuMIC.2014.6997836