Teaching advanced digital ASIC designs by a complex case study

Many previous works have introduced courses on necessary design steps for a basic knowledge of the digital ASIC design flow. This paper intends to introduce a series of labs focusing on ASIC design flow on a complex case study. Indeed, many difficult aspects of the ASIC flow only appear with complex design. This course enables teaching modern and industrial advanced digital ASIC design methodologies in a university environment with a deep-submicron technology node (CMOS 65nm from ST-microelectronics). As a result of this gradual and coherent training, students gain skills that allow them to undertake large and complex ASIC design project.