Design of a low-power and low-cost booth-shift/add multiplexer-based multiplier

Author

Rashidi, Bahram ; Sayedi, Sayed Masoud ; Farashahi, Reza Rezaeian

Author_Institution

Dept. of Elec. & Comp. Eng., Isfahan Univ. of Technol., Isfahan, Iran

fYear

2014

fDate

20-22 May 2014

Firstpage

14

Lastpage

19

Abstract

Design and implementation of a low-power and low-cost booth-shift/add multiplexer-based singed multiplier is presented. The main blocks of the circuit are constructed with some simple low-power structures. It includes multiplexer-based booth encoder and singed shifter blocks, multiplexer-based Manchester adder, an optimized and compact structure of control unit, and a low-power structure for full adder. The architecture has been successfully synthesized and verified using Xilinx ISE 11 and Spartan-3 FPGA. The results obtained by Xilinx Power Estimator (XPE) show that the proposed method has 58mW power consumption in 50MHz operation frequency.

Keywords

adders; field programmable gate arrays; logic design; low-power electronics; multiplexing; multiplying circuits; Spartan-3 FPGA; Xilinx ISE 11 FPGA; Xilinx Power Estimator; add multiplexer based multiplier; booth encoder; booth-shift multiplexer based multiplier; low-cost multiplier; low-power multiplier; multiplexer based Manchester adder; power 58 mW; singed multiplier; singed shifter blocks; Adders; Delays; Field programmable gate arrays; Frequency measurement; Multiplexing; Power demand; Simulation; Multipexer-based; low-cost; low-power; multipier;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Engineering (ICEE), 2014 22nd Iranian Conference on

Conference_Location

Tehran

Type

conf

DOI

10.1109/IranianCEE.2014.6999494

Filename

6999494