Design a dual-band low-power CMOS low noise amplifier for use in WLAN applications

A low-power dual-band complementary metal-oxide semiconductor (CMOS) low-noise amplifier (LNA) for wireless local-area network applications is presented. The switched external capacitor is added to the gate-source node of the input transistor, which match to the input port in two frequency bands of 2.4 and 5.2 GHz. By just adding a small-size switched capacitor to the conventional source-degenerated topology, the proposed LNA has an advantage of occupying less chip area compared to other concurrent topology that uses more inductors by adopting LC tank resonators. In addition, it consumes less current compared to other topology which adopts a switched transistor technique. The proposed LNA is designed and simulated using a 0.18-μtm CMOS technology. The LNA core draws only 2.3 mA from a 1 V supply voltage. The S1l and S22 of the proposed LNA are less than -10 dB in the two frequency bands. The noise figure is 3.2 and 3.5 dB at 2.4 and 5.2 GHz, respectively. The power gain is larger than 10 dB. The input P3 is -2.9 and -3.1 dBm at 2.4 and 5.2 GHz, respectively.