An ultra low-power, high-PSRR CMOS voltage reference

Author

Yousefi, Siamak ; Jalali, Mohammad

Author_Institution

Sch. of Eng., Shahed Univ., Tehran, Iran

fYear

2014

fDate

20-22 May 2014

Firstpage

428

Lastpage

432

Abstract

A CMOS voltage reference based on the difference between the gate-source voltages of pMOS and nMOS transistors operating in subthreshold region is presented. Power consumption is optimized by subthreshold design and minimizing the number of passive elements in any circuit branches from supply to the ground. A reference voltage of 912 mV with a temperature coefficient of 68 ppm/°C from -40 °C to 120 °C is achieved. Proposed voltage reference circuit can operate at supply voltages ranging from 1.5 V to 3.5 V while the current drawn from supply is at most 47 nA. Power supply rejection ratio without any filtering capacitor at 100 Hz and 10 MHz frequencies are about -68 dB and -70 dB respectively.

Keywords

CMOS integrated circuits; MOSFET; circuit optimisation; integrated circuit design; low-power electronics; power consumption; power supply circuits; reference circuits; filtering capacitor; frequency 10 MHz; frequency 100 Hz; gate-source voltages; high-PSRR CMOS voltage reference; nMOS transistors; pMOS transistors; power consumption; power supply rejection ratio; subthreshold design; temperature -40 degC to 120 degC; temperature coefficient; ultra low-power CMOS voltage reference; voltage 1.5 V to 3.5 V; voltage 912 mV; voltage reference circuit; CMOS integrated circuits; Logic gates; MOSFET; Threshold voltage; Voltage control; Voltage reference; high PSRR; low power; subthreshold;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Engineering (ICEE), 2014 22nd Iranian Conference on

Conference_Location

Tehran

Type

conf

DOI

10.1109/IranianCEE.2014.6999578

Filename

6999578