Design an ASIP for edit distance algorithm in pattern recognition

Author

Bagherizadeh, Mehdi ; Gerami, Marzieh ; Eshghi, Mohammad

Author_Institution

Dept. of Comput. Eng., Islamic Azad Univ., Tehran, Iran

fYear

2014

fDate

20-22 May 2014

Firstpage

971

Lastpage

975

Abstract

In this paper an ASIP (Application Specific Instruction set Processor) for edit distance algorithms between two strings in Pattern Recognition is presented. ASIP adopts the high performance and low power of ASIC (Application Specific Integrated Circuits) and the flexibility of DSP (Digital Signal Processors). The levenshtein algorithm is an algorithm to determine the distance between two strings. Two different Register Configurations (RC) named RC0 and RC1 is proposed. The total numbers of clock pulses in RC1 for levenshtein algorithm are lower than RC0.

Keywords

application specific integrated circuits; digital signal processing chips; instruction sets; pattern recognition; ASIC high performance; ASIC low power; ASIP design; DSP flexibility; RC0; RC1; application specific instruction set processor; application specific integrated circuits; clock pulses; digital signal processors; edit distance algorithm; levenshtein algorithm; pattern recognition; register configurations; Algorithm design and analysis; Clocks; Computer architecture; Pattern recognition; Radiation detectors; Registers; Signal processing algorithms; ASIP; DSP; FPGA; Levenshtein Algorithm; Register Configuration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Engineering (ICEE), 2014 22nd Iranian Conference on

Conference_Location

Tehran

Type

conf

DOI

10.1109/IranianCEE.2014.6999676

Filename

6999676