DocumentCode :
1786177
Title :
A New Recursive Partitioning Multicast Routing Algorithm for 3D Network-on-Chip
Author :
Meena, Narendra Kumar ; Kapoor, Hemangee K. ; Chakraborty, Shiladri
Author_Institution :
Dept. of CSE, Indian Inst. of Technol., Guwahati, Guwahati, India
fYear :
2014
fDate :
16-18 July 2014
Firstpage :
1
Lastpage :
6
Abstract :
Network on chip (NoC) provides a fast and scalable interconnect for communication between many IP cores and System on Chips (SoCs). As the number of on chip elements increase to fulfill the demand of high performance computing, scalable and efficient communication infrastructure is required for higher levels of integration, for which 3D NoCs have evolved. Multicast communication provides a better solution for many cache coherence protocols and parallel algorithms. This paper proposes a New Recursive Partitioning Multicast Routing Algorithm (3D-RPM) along with its optimized version, a New Optimized Recursive Partitioning Multicast Routing Algorithm (3D-ORPM) for 3D mesh networks. Simulation results show around 8-13% reduction in percentage link utilization and link power consumed for the proposed approach compared to the tree based 3D-XYZ multicast routing algorithm. Results show that the approach is scalable for larger networks, as well as large number of multicast destinations.
Keywords :
multicast communication; network routing; network-on-chip; parallel algorithms; recursive estimation; 3D NoC; 3D-ORPM; IP cores; SoC; cache coherence protocols; communication infrastructure; link power; multicast communication; multicast destinations; network-on-chip; optimized recursive partitioning multicast routing algorithm; parallel algorithms; percentage link utilization; system on chips; tree based 3D-XYZ multicast routing algorithm; Algorithm design and analysis; Mesh networks; Partitioning algorithms; Power demand; Routing; System-on-chip; Three-dimensional displays; 3D-NoC; Multicast routing; NoC; Recursive partitioning multicast;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design and Test, 18th International Symposium on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-5088-1
Type :
conf
DOI :
10.1109/ISVDAT.2014.6881040
Filename :
6881040
Link To Document :
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