DocumentCode
1786185
Title
Signature analysis for synthesis of reversible circuit
Author
Das, Pritam ; Mondal, Bikromadittya
Author_Institution
Dept. of Comput. Sci. & Eng., Dumkal Inst. of Eng. & Technol., Dumkal, India
fYear
2014
fDate
16-18 July 2014
Firstpage
1
Lastpage
2
Abstract
The paper proposes a novel synthesis of reversible circuit through signature analysis. A set of grouping rules are proposed that are used for minimizing the output expressions and thus reducing the number of reversible gates to construct the circuit. Experimental results depict a huge amount of reduction on CNOT gate count and quantum cost.
Keywords
logic circuits; network synthesis; CNOT gate count reduction; grouping rules; quantum cost reduction; reversible circuit synthesis; signature analysis; Circuit synthesis; Computer science; Electronic mail; Heuristic algorithms; Logic circuits; Logic gates; Quantum computing; Circuit synthesis; Quantum cost; Reversible circuit; Reversible gate; Signature-V;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design and Test, 18th International Symposium on
Conference_Location
Coimbatore
Print_ISBN
978-1-4799-5088-1
Type
conf
DOI
10.1109/ISVDAT.2014.6881043
Filename
6881043
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