Title :
Artificial neural network modelling of ADS designed Double Pole Double Throw switch
Author :
Majumdar, Shreyan ; Zuhair, Mohd ; Biswas, D.
Author_Institution :
Adv. Technol. Dev. Centre, IIT Kharagpur, Kharagpur, India
Abstract :
An alternative approach for designing a DPDT switch and characterizing it with the help of ANN modelling is presented in this work. ANN is one of the options which can be implemented to model the output parameters obtained from the designed switch. As, it does not require any detailed physical models, only a few training points are required to accurately model the standards. In this work, the DPDT switch circuit has been designed using ADS through UMS 0.15 μm pHEMT process design kit. Neural network training has been done using Levenberg-Marqaurdt back propagation algorithm employed in the ANN toolbox of MATLAB software. The outcome of simulated results in an ADS designed switch indicates an isolation of -31 to -17 dB, an insertion loss of -1.15 to -0.8 dB, a noise figure of 0.4 to 0.38 and port return loss of -8.44 to -14.36 dB for a frequency level of 1 to 5 GHz. All the results obtained from ADS simulation have been validated using ANN modelling, and it shows a close agreement with a mean squared error of about 10-8.
Keywords :
HEMT circuits; backpropagation; circuit analysis computing; microwave switches; neural nets; ADS simulation; ANN modelling; DPDT switch circuit design; Levenberg-Marqaurdt backpropagation algorithm; Matlab software; UMS pHEMT process design kit; artificial neural network modelling; double pole double throw switch; frequency 1 GHz to 5 GHz; loss -1.15 dB to -0.8 dB; loss -31 dB to -17 dB; loss -8.44 dB to -14.36 dB; neural network training; noise figure 0.4 dB to 0.38 dB; physical models; size 0.15 mum; training points; Artificial neural networks; Integrated circuit modeling; Mathematical model; Microwave circuits; Microwave integrated circuits; Switches; Artificial Neural Network; DPDT Switch; Insertion Loss; Isolation; Noise Figure; Port Return Loss;
Conference_Titel :
VLSI Design and Test, 18th International Symposium on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-5088-1
DOI :
10.1109/ISVDAT.2014.6881066