VLSI implementation of novel fast confluence ICA algorithm for signal processing applications

Independent component analysis is an iterative procedure to extract sources from observed mixtures. Power area and Convergence speed are important parameters to be improved in VLSI implementation of Independent component analysis (ICA) techniques. This paper presents VLSI implementation of novel fast confluence adaptive independent component analysis (FCAICA) technique which has reduced power, area and improved convergence speed. The reduction in area and power is achieved by hardware optimization scheme and high convergence speed is achieved by a novel optimization scheme that adaptively changes the weight vector based on the kurtosis value. To increase the number precision and dynamic range of the signals, floating-point (FP) arithmetic units are used. Simulation, Synthesis, Floor planning, Placement, Routing are carried out and data stream are created with Cadence Tool 10.1. The FCA ICA algorithm operates at 2.91MHz with 12.092 mW of power in 0.18um technology. It is more effective compared with most popular FastICA algorithm.