Title :
Post-routing latch optimization for timing closure
Author :
Held, Stephan ; Schorr, Ulrike
Author_Institution :
Res. Inst. for Discrete Math., Bonn, Germany
Abstract :
We present an algorithm which permutes latch positions and sizes within a clock cluster to maximize the worst slack. It preserves the clock footprint and routing, and can therefore be applied late in the design flow after clock network design.
Keywords :
clocks; flip-flops; microprocessor chips; network routing; optimisation; search problems; binary search; bipartite matching; clock network design; microprocessor; negative endpoint slack sum; post-routing latch optimization; timing closure; wirelength minimization; Algorithm design and analysis; Clocks; Clustering algorithms; Delays; Latches; Optimization; Clock network; latch clustering; latch planning;
Conference_Titel :
Design Automation Conference (DAC), 2014 51st ACM/EDAC/IEEE
Conference_Location :
San Francisco, CA
DOI :
10.1145/2593069.2593182
