Advanced soft-error-rate (SER) estimation with striking-time and multi-cycle effects

Soft error rate (SER) has become a critical reliability issue for CMOS designs due to continuous technology scaling. However, the striking-time and multi-cycle effects have not been properly considered in SER for advanced CMOS designs. Therefore, in this paper, the striking-time and multi-cycle effects are formulated into the problem of SER estimation, and then a SER analysis framework is proposed, accordingly. Experimental results show that SERs on the benchmark circuits are seriously underestimated when ignoring both effects. Moreover, SERs increase more on those high-performance or low-power CMOS designs. New treatment to SER needs to be explored in the future.