Metasynthesis for Designing Automotive SoCs

Designing Automotive SoCs requires product specific support of one or more different design targets as different degrees of safety, reliability, very low power, or high current support as well as different design features as multi-core, sensor-on-chip, or system-in-package. Considering that wide design space, it´s clear that EDA industry that is focusing on generic applicable tools leaves a wide field for automation unsupported. This paper presents a novel approach to system synthesis named Metasynthesis. It proposes a new highly flexible methodology based on synthesizing system synthesis tools. These synthesized tools finally make the synthesis step from a description above implementation level, e.g. requirements, specification, or a domain specific description to implementation level, e.g. C, SystemVerilog-RTL or schematic. The name “Meta”-Synthesis was chosen in the sense of a synthesis tool “beyond” another synthesis tool or as already said a synthesis tool synthesizing another synthesis tool. The term “Meta” also reflects the underlying metamodeling technique. Even if the approach requires additional effort in building the system synthesis tool, it helps to shorten overall design time, since building the tool is highly automated due to the presented Metasynthesis approach. Also the input views are fast to make since they can be kept simple and compact. The Metasynthesis approach was proven so far in over 90 different automotive SoC and other applications gaining productivity improvements of 95% considering single design steps and gaining up to 70% effort reduction for the complete implementation of automotive SoCs. Some designers report, that they generate up to 80% of the chip´s overall RTL code with synthesized tools.