DocumentCode :
1786870
Title :
Low power GPGPU computation with imprecise hardware
Author :
Hang Zhang ; Putic, Mateja ; Lach, John
Author_Institution :
Comput. Eng., Univ. of Virginia, Charlottesville, VA, USA
fYear :
2014
fDate :
1-5 June 2014
Firstpage :
1
Lastpage :
6
Abstract :
Massively parallel computation in GPUs significantly boosts performance of compute-intensive applications but creates power and thermal issues that limit further performance scaling. This paper demonstrates significant GPGPU power savings by relaxing application accuracy requirements and enabling the use of low power imprecise hardware (IHW). A synthesized set of novel imprecise floating point arithmetic units is presented. GPGPU-Sim and GPUWattch are used to estimate impacts of IHW units on output quality and system-level power consumption, providing a quality-power tradeoff model for application-specific optimization. Experimental results for a 45 nm process show up to 32% power savings with negligible impacts on output quality.
Keywords :
floating point arithmetic; graphics processing units; low-power electronics; GPGPU power savings; GPGPU-Sim; GPUWattch; application-specific optimization; compute-intensive applications; imprecise floating point arithmetic units; low power GPGPU computation; low power imprecise hardware; parallel computation; quality-power tradeoff model; size 45 nm; system-level power consumption; Adders; Computational modeling; Graphics processing units; Hardware; Linear approximation; Measurement; Power demand; Approximate Computing; Floating Point Unit; GPGPU; Imprecise Hardware; Special Function Unit;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2014 51st ACM/EDAC/IEEE
Conference_Location :
San Francisco, CA
Type :
conf
Filename :
6881426
Link To Document :
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