DocumentCode
1786888
Title
A rigorous graphical technique for predicting sub-harmonic injection locking in LC oscillators
Author
Bhushan, Palak
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, Berkeley, CA, USA
fYear
2014
fDate
1-5 June 2014
Firstpage
1
Lastpage
8
Abstract
We develop methods for simply yet rigorously analyzing sub-harmonic injection locking (SHIL) in LC oscillators. Our method respects nonlinearities while offering intuition and design insights into the underlying mechanisms of different modes of locking. It can predict the presence/absence, number, stability and oscillation amplitudes of locks, as well as lock ranges. We use practical LC oscillator topologies from integrated RF and UHF applications for demonstration, validating our technique against SPICE-level simulations while being 1-2 orders of magnitude faster. To our knowledge, this is the first technique/tool for SHIL general enough to treat any kind of nonlinearity in LC oscillators.
Keywords
LC circuits; graph theory; harmonic oscillators (circuits); injection locked oscillators; LC oscillator topologies; SHIL; SPICE-level simulations; oscillation amplitudes; rigorous graphical technique; sub-harmonic injection locking; Feedback loop; Harmonic analysis; Injection-locked oscillators; RLC circuits; Stability analysis; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2014 51st ACM/EDAC/IEEE
Conference_Location
San Francisco, CA
Type
conf
DOI
10.1145/2593069.2593076
Filename
6881443
Link To Document