Probabilistic bug localization via statistical inference based on partially observed data

Upon the observation of a circuit failure, problematic circuit blocks and parameters need to be localized before they can be fixed or by-passed - this has traditionally been highly manual and problem-specific. In this paper, we present a bug localization methodology that automatically identifies and ranks potential root-causes probabilistically. We model linear and nonlinear sub-circuits using the corresponding probabilistic graphical models, and formulate the bug localization problem as a statistical inference problem given partially observed data. We infer the posterior distribution of underlying circuit parameters, which provides a statistical measure of whether the bug lies in each sub-circuit. We have verified this methodology on a high-speed I/O link circuit, and have demonstrated its effectiveness of root-causing circuit bugs.