DocumentCode
1787031
Title
Functional ECO using metal-configurable gate-array spare cells
Author
Hua-Yu Chang ; Jiang, Iris Hui-Ru ; Yao-Wen Chang
Author_Institution
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear
2014
fDate
1-5 June 2014
Firstpage
1
Lastpage
6
Abstract
Metal-configurable gate-array spare cells, which have versatile functionality, are developed to overcome the inflexibility of standard spare cells used in conventional metal-only engineering change order (ECO). In this paper, we focus on functional ECO optimization using the new type of spare cells to fully exploit its strength. We observe that this functional ECO problem has the nature of dynamic logical and physical costs for selecting spare gate arrays. Unlike existing functional ECO works, which perform technology mapping based on ECO patches, we perform reverse mapping from spare gate arrays to handle these dynamic costs. We devise a spare array relation graph to record geometrical adjacency among spare gate arrays and interleave with the and-inverter network of ECO patches. To avoid redundant traversal and monitor the dynamic costs, we adopt A* search to simultaneously traverse and map between the logical ECO network and the physical spare array relation graph.
Keywords
logic design; logic gates; optimisation; and-inverter network; metal-configurable gate-array spare cells; metal-only engineering change order; physical spare array relation graph; standard spare cells; Libraries; Logic arrays; Logic gates; Optimization; Silicon; Standards; Wiring; Engineering change order; Gate array; Technology mapping;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2014 51st ACM/EDAC/IEEE
Conference_Location
San Francisco, CA
Type
conf
DOI
10.1145/2593069.2593145
Filename
6881518
Link To Document