DocumentCode
1787587
Title
Compaction-free compressed cache for high performance multi-core system
Author
Po-Yang Hsu ; Pei-Lan Lin ; TingTing Hwang
Author_Institution
Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear
2014
fDate
2-6 Nov. 2014
Firstpage
140
Lastpage
147
Abstract
Compressed cache was used in shared last level cache (LLC) to increase the effective capacity. However, because of various data compression sizes, fragmentation problem of storage is inevitable in this cache design. When it happens, usually, a compaction process is invoked to make contiguous storage space. This compaction process induces extra cycle penalty and degrades the effectiveness of compressed cache design. In this paper, we propose a compaction-free compressed cache architecture which can completely eliminate the time for executing compaction. Based on this cache design, we demonstrate that our results, compared with the conventional cache, have system performance improvement by 16% and energy reduction by 16%. Compared with the work by Alameldeen et al. [1], our design has 5% more performance improvement and 3% more energy reduction. Compared with the work by Sardashti et al. [2], our design has 3% more performance improvement and 2% more energy reduction.
Keywords
cache storage; data compression; microprocessor chips; multiprocessing systems; cache design; compaction free compressed cache architecture; contiguous storage space; data compression; energy reduction; high performance multicore system; shared last level cache; Benchmark testing; Cache memory; Compaction; Data compression; Runtime; System performance; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design (ICCAD), 2014 IEEE/ACM International Conference on
Conference_Location
San Jose, CA
Type
conf
DOI
10.1109/ICCAD.2014.7001344
Filename
7001344
Link To Document