Title :
ICCAD-2014 CAD contest in simultaneous CNF encoder optimization with SAT solver setting selection and benchmark suite: Special session paper: CAD contest
Author :
Chih-Jen Hsu ; Wei-Hsun Lin ; Chi-An Wu ; Kei-Yong Khoo
Author_Institution :
Cadence Taiwan, Cadence Taiwan, Inc., Hsinchu, Taiwan
Abstract :
Efficiently solving numerous relevant circuit satisfiability (CircuitSAT) problems becomes a crucial industrial topic as the design scale expands. In this topic, we are especially interested in: how to select the best setting of the Boolean satisfiability (SAT) solver based on sample problems, and what is the most useful conjunctive normal form (CNF) encoding for some particular designs and particular applications. From practical experience, the run time yielded by solving SAT problems using the default setting is far from best run time; same is true for CNF encoding. In this contest, we ask the participants to design the algorithm for exploring the best setting based on some sample cases, and we determine the contest winners by evaluating the run time for solving the remaining problems. The benchmark suites are extracted from the real designs in our applications of interest. We look forward to triggering the academic area in further investigating this problem.
Keywords :
Boolean algebra; circuit CAD; circuit optimisation; computability; integrated circuit design; Boolean satisfiability solver; CAD contest; CNF encoder optimization; CNF encoding; ICCAD; SAT solver setting selection; circuit satisfiability problems; circuitSAT; conjunctive normal form encoding; Benchmark testing; Design automation; Encoding; Hardware design languages; Logic gates; Runtime; Sugar; Benchmarks; Boolean Satisfiability; CNF transformation; Circuit Satisfiability;
Conference_Titel :
Computer-Aided Design (ICCAD), 2014 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA
DOI :
10.1109/ICCAD.2014.7001375