DocumentCode
1788654
Title
Power estimations vs. power measurements in Spartan-6 devices
Author
Oliver, Juan P. ; Perez Acle, Julio ; Boemo, Eduardo
Author_Institution
Inst. de Ing. Electr., Univ. de la Republica Montevideo, Montevideo, Uruguay
fYear
2014
fDate
5-7 Nov. 2014
Firstpage
1
Lastpage
5
Abstract
Experimental measurements of power consumption for core logic of a 45-nm Spartan-6 FPGA and the comparison with the values predicted by the power estimation tool are presented. The measurement setup, benchmark suite, and EDA flows utilized to obtain power estimations are described. Several types of multipliers implemented in both LUTs and embedded blocks have been utilized as case-studies. They include versions with different levels of pipelining. In addition, a set of actual circuits obtained from OpenCores is analyzed. Main results of power estimations errors are presented and compared.
Keywords
benchmark testing; field programmable gate arrays; power consumption; power measurement; power supplies to apparatus; 45-nm Spartan-6 FPGA; EDA flows; LUT; OpenCores; Spartan-6 devices; benchmark suite; core logic; embedded blocks; experimental power consumption measurement; power estimation tool; Decision support systems; low-power; power estimations; power measurements;
fLanguage
English
Publisher
ieee
Conference_Titel
Programmable Logic (SPL), 2014 IX Southern Conference on
Conference_Location
Buenos Aires
Print_ISBN
978-1-4799-6846-6
Type
conf
DOI
10.1109/SPL.2014.7002214
Filename
7002214
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