DocumentCode
1790568
Title
Design and implementation of GPU-based turbo decoder with a minimal latency
Author
Heungseop Ahn ; Yong Jin ; Sangwook Han ; Seungwon Choi ; Sungsoo Ahn
Author_Institution
Dept. of Electron. & Comput. Eng., Hanyang Univ., Seoul, South Korea
fYear
2014
fDate
22-25 June 2014
Firstpage
1
Lastpage
2
Abstract
Decoding latency of the turbo decoder has been a serious problem in real-time processing of communication systems. This paper presents a novel procedure of reducing the latency of the turbo decoder which has been implemented with GPU (Graphic Processing Unit). The main contribution of this paper is to present an efficient procedure of reducing the latency of GPU-based turbo decoder through an efficient parallel processing of maximum a posteriori (MAP). Through experimental tests, we have verified that the proposed turbo decoder reduces the latency from 34,767μs to 273μs per iteration.
Keywords
codecs; decoding; graphics processing units; maximum likelihood estimation; turbo codes; GPU; MAP; communication systems real-time processing; decoding latency; graphic processing unit; maximum a posteriori; turbo decoder; Bit error rate; Communication systems; Decoding; Educational institutions; Graphics processing units; Iterative decoding; Parallel processing; CUDA; GPU; Turbo decoder; parallel MAP decoder;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics (ISCE 2014), The 18th IEEE International Symposium on
Conference_Location
JeJu Island
Type
conf
DOI
10.1109/ISCE.2014.6884510
Filename
6884510
Link To Document