DocumentCode
1792534
Title
Process development for 3D integration: Conductive wafer bonding for high density inter-chip interconnection
Author
Chongshen Song ; Wenqi Zhang ; Dongkai Shangguan
Author_Institution
Nat. Center for Adv. Packaging, Wuxi, China
fYear
2014
fDate
15-16 July 2014
Firstpage
4
Lastpage
4
Abstract
This paper discusses the application of conductive wafer bonding, especially wafer level hybrid Cu-Cu bonding, for realizing high density inter-chip interconnection. 3D integration process using conductive wafer bonding and the test vehicle for bonding process evaluation are described. Different pre-bonding surface treatment methods and bonding procedures are studied and compared for yield and throughput optimization.
Keywords
copper; integrated circuit interconnections; surface treatment; three-dimensional integrated circuits; wafer bonding; wafer level packaging; 3D integration process; Cu; bonding process evaluation; conductive wafer bonding; high density interchip interconnection; prebonding surface treatment methods; wafer level hybrid Cu-Cu bonding; Bonding; Metals; Three-dimensional displays; Through-silicon vias; Vehicles; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Temperature Bonding for 3D Integration (LTB-3D), 2014 4th IEEE International Workshop on
Conference_Location
Tokyo
Print_ISBN
978-1-4799-5260-1
Type
conf
DOI
10.1109/LTB-3D.2014.6886143
Filename
6886143
Link To Document