Energy efficient parallel computing on the PULP platform with support for OpenMP

Many-core architectures structured as fabrics of tightly-coupled clusters have shown promising results on embedded parallel applications, providing state-of-art performance with a reduced power budget. We propose PULP (Parallel processing Ultra-Low Power platform), an architecture built on clusters of tightly-coupled OpenRISC ISA cores, with advanced techniques for fast performance and energy scalability that exploit the capabilities of the STMicroelectronics UTBB FD-SOI 28nm technology. To exploit thread level parallelism of applications PULP supports a lightweight implementation of OpenMP 3.0 running on a bare metal runtime optimized for embedded architectures. The proposed platform demonstrates able to provide high performance for a wide range of workloads ranging from 1.2 MOPS to 3 GOPS with a peak energy efficiency of 210 GOPS/W. Thanks to the efficient exploitation of forward and reverse body biasing on fine grained regions of the cluster, the platform is able to improve by up to 1.3x the energy efficiency of parallel portions, and by up to 2.4x the energy efficiency of sequential portions of OpenMP applications.