• DocumentCode
    1793405
  • Title

    Voltage-to-digital converter with event-driven charge redistribution

  • Author

    Koscielnik, Dariusz ; Szyduczynski, Jakub ; Miskowicz, Marek

  • Author_Institution
    Dept. of Electron., AGH Univ. of Sci. & Technol., Kraków, Poland
  • fYear
    2014
  • fDate
    3-5 Dec. 2014
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    The paper addresses a design of an analog-to-digital converter based on event-driven successive charge redistribution intended to convert signals originated in voltage domain. Since the conversion is realized in charge domain, the sampling is substituted by a linear translation of the continuous-time input voltage to proportional input charge. Two methods of voltage-to-charge translation called respectively voltage-mode and current-mode are discussed in the paper. Furthermore, it is explicitly shown that the conversion adopts binary search algorithm with reducing quantization error by concurrent charge comparison and subtraction.
  • Keywords
    analogue-digital conversion; electric charge; analog-to-digital converter design; binary search algorithm; continuous-time input voltage; current- mode; event-driven successive charge redistribution; linear translation; proportional input charge domain; quantization error reduction; signal conversion; voltage domain; voltage-mode; voltage-to-charge translation methods; voltage-to-digital converter; Arrays; Capacitance; Capacitors; Charge transfer; Clocks; Quantization (signal); Uncertainty; Analog-to-digital converter; asynchronous design; binary search algorithm; charge redistribution;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical & Electronics Engineers in Israel (IEEEI), 2014 IEEE 28th Convention of
  • Conference_Location
    Eilat
  • Print_ISBN
    978-1-4799-5987-7
  • Type

    conf

  • DOI
    10.1109/EEEI.2014.7005831
  • Filename
    7005831