• DocumentCode
    179391
  • Title

    Cooperative CPU+GPU deblocking filter parallelization for high performance HEVC video codecs

  • Author

    de Souza, Diego F. ; Roma, Nuno ; Sousa, Leonel

  • Author_Institution
    IST / INESC-ID, Lisbon, Portugal
  • fYear
    2014
  • fDate
    4-9 May 2014
  • Firstpage
    4993
  • Lastpage
    4997
  • Abstract
    Heterogeneous platforms integrating several CPU cores and GPU accelerators have established in several application domains, from desktop, server and mobile. To take full advantage of such platforms, video encoders/decoders have to exploit a broader design space, by cooperatively executing in all the available CPU and GPU cores. To attain such objective, three novel contributions that aim the exploitation of the maximum parallelism level in an HEVC deblocking filter are presented: i) a highly optimized CPU parallel implementation, which outperforms the current state of the art; ii) the first known GPU implementation of the HEVC deblocking filter; and iii) an hybrid and load-balanced CPU+GPU implementation, where all the available resources cooperatively execute, in order to maximize the attained performance. The obtained experimental results demonstrated the ability to achieve processing times as low as 0.8 ms and 0.5 ms to filter 1080p I-type and B-type frames, respectively, corresponding to speedup factors as high as 17 and 9.
  • Keywords
    graphics processing units; parallel processing; video codecs; video coding; 1080p I-type frames; B-type frames; CPU cores; CPU parallel implementation; GPU accelerators; HEVC deblocking filter; cooperative CPU+GPU deblocking filter parallelization; high performance HEVC video codecs; speedup factors; video encoders-decoders; Central Processing Unit; Decoding; Encoding; Graphics processing units; Instruction sets; Standards; Video coding; Graphics Processing Unit; HEVC; Video coding; deblocking filter; parallel processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech and Signal Processing (ICASSP), 2014 IEEE International Conference on
  • Conference_Location
    Florence
  • Type

    conf

  • DOI
    10.1109/ICASSP.2014.6854552
  • Filename
    6854552