High performance floating-gate technology compatible antifuse

Author

Xiaodong Xie ; Wei Li ; Jianjun Li ; Gang Wang

Author_Institution

State Key Lab. of Electron. Thin Films & Integrated Devices, Univ. of Electron. Sci. & Technol. of China, Chengdu, China

Volume

49

Issue

12

fYear

2013

fDate

June 6 2013

Firstpage

763

Lastpage

764

Abstract

An antifuse structure that is fully compatible with the standard floating-gate technology is presented. The antifuse consists of an oxide-nitride-oxide dielectric layer, sandwiched between polysilicon and N-well layers. The characteristics of the antifuse are investigated. The off-state resistance of the antifuse is larger than 10 GΩ. The programmed antifuses show linear ohmic characteristics and have a tight resistance distribution centred around 350 Ω. The time dependent dielectric breakdown measurements show that the extrapolated lifetime of the unprogrammed antifuse at 5.5 V is as long as 40 years, and the resistance change of post-program antifuses under the continuous reading mode test is lower than 5%.

Keywords

dielectric materials; elemental semiconductors; field programmable gate arrays; integrated memory circuits; semiconductor-insulator boundaries; silicon; N-well layers; TDDB measurements; antifuse structure; dielectric layer; floating-gate technology; off-state resistance; polysilicon; voltage 5.5 V;

fLanguage

English

Journal_Title

Electronics Letters

Publisher

iet

ISSN

0013-5194

Type

jour

DOI

10.1049/el.2012.3574

Filename

6550144