Memristive multistate pipeline register

Over the past years, new memory technologies such as RRAM, STT-MRAM, and PCM have emerged. These technologies employ devices located within the metal layers of the integrated circuit, which are relatively fast, dense, and power efficient and can be considered as `memristors.´ In this paper, we present these emerging memory technologies as enablers to the era of memory-intensive computing, which brings interesting opportunities for novel architectural applications. As an example, we present the multistate pipeline register (MPR), a structure that stores the microarchitectural state of multiple threads. We show that an MPR can eliminate the need to flush the pipeline upon a thread switch in Switch-on-Event (SoE) multi-threading machines. We call the new microarchitectural scheme, Continuous Flow Multi-Threading (CFMT), and compare the performance and power consumption against traditional SoE machines. Memristor-based CFMT exhibits an average performance improvement of 32% while reducing power consumption by 8.5%, thereby significantly increasing the performance to energy ratio.