DocumentCode
1796863
Title
ICARO: Congestion isolation in networks-on-chip
Author
Escamilla, Jose V. ; Flich, Jose ; Garcia, Pedro Javier
Author_Institution
Grupo de Arquitecturas Paralelas, Univ. Politec. de Valencia, Valencia, Spain
fYear
2014
fDate
17-19 Sept. 2014
Firstpage
159
Lastpage
166
Abstract
The growing demand of computing power and the emerging trend towards heterogeneity lead to integrate more and more cores and specialized modules into a single chip. As the number of cores per chip increases, the network interconnecting them must satisfy the growing communication needs. However, several factors as aggressive traffic patterns, power-saving and fault-tolerance mechanisms may lead to oversubscribed resources in the network, thereby generating congestion and so degrading the overall network performance. In this paper we propose ICARO, a mechanism to dynamically isolate the traffic flows contributing to congestion making use of dedicated virtual networks. In this way, ICARO prevents the head-of-line blocking effect derived from congestion, thereby improving overall network performance. We analyze thoroughly our proposal, especially from the robustness point of view, showing that it effectively manages to identify and isolate congested flows, improving network performance up to 82% with respect to previous proposals.
Keywords
fault tolerance; isolation technology; network-on-chip; aggressive traffic flow patterns; computing power; congestion isolation; dedicated virtual networks; fault-tolerance mechanisms; head-of-line blocking effect; network interconnection; networks-on-chip; overall network performance improvement; oversubscribed resources; power-saving; single chip; Measurement; Nickel; Ports (Computers); Proposals; Registers; Routing; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Networks-on-Chip (NoCS), 2014 Eighth IEEE/ACM International Symposium on
Conference_Location
Ferrara
Type
conf
DOI
10.1109/NOCS.2014.7008775
Filename
7008775
Link To Document