Title :
A 10-bit 320-MS/s low-cost SAR ADC for IEEE 802.11ac applications in 20-nm CMOS
Author_Institution :
MediaTek Inc., Hsinchu, Taiwan
Abstract :
This paper presents a low-cost SAR ADC design for IEEE 802.11ac applications. A binary-scaled recombination weighting method for SAR ADC is disclosed in this work. The proposed SAR ADC achieved 9.29 ENOB with an FOM of 6.8 fJ/conversion-step at 0.9 V and 160 MS/s, and achieved 9.20 ENOB with an FOM of 8.1 fJ/conversion-step at 1.0 V and 320 MS/s. The ADC core only occupies an area of 33 μm × 35 μm in 20-nm CMOS process.
Keywords :
CMOS integrated circuits; analogue-digital conversion; wireless LAN; CMOS process; ENOB; FOM; IEEE 802.11ac applications; binary-scaled recombination weighting method; low-cost SAR ADC design; size 20 nm; voltage 0.9 V; voltage 1.0 V; word length 10 bit; Arrays; CMOS integrated circuits; Capacitors; Frequency measurement; IEEE 802.11 Standards; Layout; Wireless LAN; 20nm CMOS; IEEE 802.11ac; SAR ADC;
Conference_Titel :
Solid-State Circuits Conference (A-SSCC), 2014 IEEE Asian
Conference_Location :
KaoHsiung
Print_ISBN :
978-1-4799-4090-5
DOI :
10.1109/ASSCC.2014.7008864
