Title :
A 16.8Gbps/channel single-ended transceiver in 65nm CMOS for SiP based DRAM interface on Si-carrier channel
Author :
Hyunbae Lee ; Taeksang Song ; Sangyeon Byeon ; Kwanghun Lee ; Inhwa Jung ; Seongjin Kang ; Ohkyu Kwon ; Koeun Cheon ; Donghwan Seol ; Jongho Kang ; Gunwoo Park ; Yunsaing Kim
Author_Institution :
SK Hynix, Icheon, South Korea
Abstract :
A 16.8Gbps/channel single ended transceiver for SiP based DRAM interface on silicon carrier channel is presented. A transmitter, receiver, and channel are all included in a single package. On the transmitter, 1 tap FFEs are used in 4:1 MUX and in output driver. On the receiver, source follower based CTLEs and self Vref generator are used for obtaining effective single ended signaling on Si-carrier channel. A BER that is less than 1e-12 is achieved in 65nm CMOS. The power efficiency of the transceiver is 5.9pJ/bit with 120Ω terminations at each transceiver side.
Keywords :
CMOS integrated circuits; DRAM chips; equalisers; system-in-package; transceivers; CMOS; DRAM interface; SiP; bit rate 16.8 Gbit/s; continuous time linear equalizer; feed forward equalizer; multiplexer; silicon carrier channel; single ended signaling; single ended transceiver; size 65 nm; source follower; Bit error rate; CMOS integrated circuits; Random access memory; Receivers; Sensors; Silicon; Transceivers; BER and 120Ω terminations; CTLE; FFE; Self Vref Generator; SiP based DRAM Interface; Single Ended Transceiver;
Conference_Titel :
Solid-State Circuits Conference (A-SSCC), 2014 IEEE Asian
Conference_Location :
KaoHsiung
Print_ISBN :
978-1-4799-4090-5
DOI :
10.1109/ASSCC.2014.7008876
