An area-efficient capacitively-coupled instrumentation amplifier with a duty-cycled Gm-C DC servo loop in 0.18-μm CMOS

A chopped capacitively-coupled instrumentation amplifier (CCIA) with a proposed duty-cycled Gm-C DC servo loop (DSL) for bio-potential signal acquisition is presented. The proposed architecture realizes a large time constant with small circuit area without sacrificing noise and power performance. Furthermore, this pseudo-resistor-less design grants this architecture easily portable for more advanced processes. Fabricated in a 0.18-μm CMOS, this chip draws 2.37 μA from a 1.8-V supply and occupies only an active area of 0.43 mm². The total integrated noise from 0.5 to 100 Hz is 1.04 μV_rms and results in a noise efficiency factor of 7.8.