Title :
A 0.015-mm2 60-GHz reconfigurable wake-up receiver by reusing multi-stage LNAs
Author :
Rui Wu ; Qinghong Bu ; Wei Deng ; Okada, Kenichi ; Matsuzawa, Akira
Author_Institution :
Dept. of Phys. Electron., Tokyo Inst. of Technol., Tokyo, Japan
Abstract :
An area-efficient 60-GHz wake-up receiver (WuRx) using reconfiguration techniques of multistage low-noise amplifiers (LNAs) is presented. The gain stages of the 60-GHz LNA are reused as the envelope detectors for the wake-up receiver. Therefore, the bulky components such as extra switches between the wake-up receiver and the LNA, additional antennas, and excess input matching network can be removed in the design of the wake-up receiver. Furthermore, due to the reconfigurability of the LNA, the wake-up receiver can work in sensitivity-boost mode by using several LNA gain stages as a pre-amplifier. The wake-up receiver is fabricated in a 65-nm CMOS process occupying a core area of 0.015 mm (excluding the LNA). The WuRx achieves the sensitivity of -46 dBm and -60 dBm with a power consumption of 64 μW and 12.7 mW, respectively.
Keywords :
CMOS analogue integrated circuits; antennas; detector circuits; low noise amplifiers; radio receivers; CMOS process; antennas; bulky components; envelope detectors; frequency 60 GHz; gain stages; input matching network; multistage LNA; multistage low-noise amplifiers; power 12.7 mW; power 64 muW; pre-amplifier; reconfigurable wake-up receiver; reconfiguration techniques; sensitivity-boost mode; size 65 nm; Baseband; Envelope detectors; Logic gates; Power demand; Receivers; Sensitivity; Transceivers; 60-GHz wake-up receiver; CMOS; LNA-reused; area-efficient;
Conference_Titel :
Solid-State Circuits Conference (A-SSCC), 2014 IEEE Asian
Conference_Location :
KaoHsiung
Print_ISBN :
978-1-4799-4090-5
DOI :
10.1109/ASSCC.2014.7008890