Title :
A DC-46Gb/s 2:1 multiplexer and source-series terminated driver in 20nm CMOS technology
Author :
Jian Hong Jiang ; Parikh, Samir ; Lionbarger, Mark ; Nedovic, Nikola ; Yamamoto, Takayuki
Author_Institution :
Fujitsu Labs. of America, Sunnyvale, CA, USA
Abstract :
We present a 46Gb/s 2:1 multiplexer and a source series terminated full rate driver for high speed chip-to-chip communications. The multiplexer and the driver are implemented using the pseudo-differential static CMOS circuit. Transmitter driver uses the push-pull structure to produce a VDD peak-to-peak differential voltage swing. The circuit uses no current mode logic gates or large on-chip passive devices aside from series-connected on-chip resistor and the T-coil used to minimize the return loss. We confirmed the total jitter of about 7ps at 46Gb/s and eye opening of 0.605UI up to 50 Gb/s on the test circuit fabricated in 20nm CMOS technology. Measured power consumption is 38.7mW at 46Gb/s (0.84pJ/b power efficiency).
Keywords :
CMOS integrated circuits; driver circuits; logic gates; multiplexing equipment; power consumption; CMOS circuit; CMOS technology; T-coil; bit rate 46 Gbit/s; bit rate 50 Gbit/s; high speed chip-to-chip communications; logic gates; multiplexer; on-chip passive devices; peak-to-peak differential voltage swing; power 38.7 mW; power consumption; series-connected on-chip resistor; size 20 nm; source-series terminated driver; transmitter driver; CMOS integrated circuits; CMOS technology; Jitter; Loss measurement; Multiplexing; Resistors; Transmitters; CMOS; T-coil; multiplexer; push-pull; source-series terminated driver; termination; transmitter;
Conference_Titel :
Solid-State Circuits Conference (A-SSCC), 2014 IEEE Asian
Conference_Location :
KaoHsiung
Print_ISBN :
978-1-4799-4090-5
DOI :
10.1109/ASSCC.2014.7008939
