Design and hardware implementation of a closed-loop stable fuzzy controller

In this paper a stable in Lyapunov sense closed-loop fuzzy control system is designed and hardware instrumented (embedded) in a FPGA, to solve the velocity regulation problem of a DC motor. The design process allow to minimize the size of the fuzzy rule-base and the number of membership function for each input-output variable. Moreover, the design process automatically gives the granulation of the input-output variables. The resulting FLC is targeted to a Xilinx Spartan 3A device using Xilinx foundation environment and Xilinx System Generator.