Multilayer perceptron network with integrated training algorithm in FPGA

Author

Perez-Garcia, A.N. ; Tornez-Xavier, G.M. ; Flores-Nava, L.M. ; Gomez-Castaneda, F. ; Moreno-Cadenas, J.A.

Author_Institution

Dept. of Electr. Eng., CINVESTAV-IPN, Mexico City, Mexico

fYear

2014

fDate

Sept. 29 2014-Oct. 3 2014

Firstpage

1

Lastpage

6

Abstract

In this manuscript we present the implementation of an artificial neural network type Multilayer Perceptron (ANN-MP or NNMP) in Field-Programmable Gate Arrays (FPGA), including Back-Propagation training method based on descendent gradient. This network has 2 reconfigurable hidden layers, adjustable parameters (epochs and ratio learning) and batch learning. The proposed architecture aims to reduce the number of logical elements to be used, so serial processing is utilized. In order to test the performance of the trained network, a nonlinear function was approximated with satisfactory results.

Keywords

backpropagation; field programmable gate arrays; gradient methods; multilayer perceptrons; ANN-MP; FPGA; NNMP; artificial neural network type; back-propagation training method; descendent gradient; integrated training algorithm; multilayer perceptron network; nonlinear function; Artificial neural networks; Computer architecture; Equations; Field programmable gate arrays; Hardware; Neurons; Training; Artificial neural network; FPGA; back propagation; descendent gradient;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Engineering, Computing Science and Automatic Control (CCE), 2014 11th International Conference on

Conference_Location

Campeche

Print_ISBN

978-1-4799-6228-0

Type

conf

DOI

10.1109/ICEEE.2014.6978300

Filename

6978300