• DocumentCode
    17996
  • Title

    Single-Event Latchup Modeling Based on Coupled Physical and Electrical Transient Simulations in CMOS Technology

  • Author

    Artola, L. ; Hubert, Guillaume ; Rousselin, T.

  • Author_Institution
    ONERA The French Aerosp. Lab., Toulouse, France
  • Volume
    61
  • Issue
    6
  • fYear
    2014
  • fDate
    Dec. 2014
  • Firstpage
    3543
  • Lastpage
    3549
  • Abstract
    This work presents a SEL modeling based on physical simulations performed by MUSCA SEP3 and electrical simulations. This approach leads to use the layout description and process information (from TCAD, design or ITRS hypotheses) of a CMOS inverter cell to extract the characteristics of the parasitic circuitry. This approach is totally compatible with the Monte Carlo tool, MUSCA SEP3, with the aim to propose estimations of SEL susceptibility as well in terms of cross section, as sensitivity mapping. The latchup transient response is calculated and compared with heavy ion and TPA experimental measurements. The good agreements are shown in terms of latchup current and the electrical steps leading to the SEL occurrence. Complementary comparisons of SEL sensitive area mapping for TPA irradiation are presented and assessed. The ability of the model to take into account the temperature impact on the SEL sensitivity is presented and discussed.
  • Keywords
    CMOS integrated circuits; integrated circuit modelling; invertors; sensitivity analysis; transient response; CMOS inverter cell; CMOS technology; MUSCA SEP3; Monte Carlo tool; SEL sensitive area mapping; SEL susceptibility estimation; TPA experimental measurement; TPA irradiation; complementary metal oxide semiconductor technology; coupled physical transient simulation; electrical transient simulation; heavy ion; latchup current; latchup transient response; multi scales single event phenomena predictive platform; parasitic circuitry; sensitivity mapping; single-event latchup modeling; two photon absorption; Bipolar transistors; CMOS integrated circuits; CMOS technology; Inverters; Semiconductor device modeling; Sensitivity; Transient analysis; CMOS technology; Circuit model; MUSCA SEP3; single event latchup; temperature impact;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.2014.2362857
  • Filename
    6939732