• DocumentCode
    1799892
  • Title

    Futility Scaling: High-Associativity Cache Partitioning

  • Author

    Ruisheng Wang ; Lizhong Chen

  • Author_Institution
    Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
  • fYear
    2014
  • fDate
    13-17 Dec. 2014
  • Firstpage
    356
  • Lastpage
    367
  • Abstract
    As shared last level caches are widely used in many-core CMPs to boost system performance, partitioning a large shared cache among multiple concurrently running applications becomes increasingly important in order to reduce destructive interference. However, while recent works start to show the promise of using replacement-based partitioning schemes, such existing schemes either suffer from the severe associativity degradation when the number of partitions is high, or lack the ability to precisely partition the whole cache which leads to decreased resource efficiency. In this paper, we propose Futility Scaling (FS), a novel replacement-based cache partitioning scheme that can precisely partition the whole cache while still maintaining high associativity even with a large number of partitions. The futility of a cache line represents the uselessness of this line to application performance and can be ranked in different ways by various policies, e.g., LRU and LFU. The idea of FS is to control the size of a partition by properly scaling the futility of its cache lines. We study the properties of FS on both associativity and sizing in an analytical framework, and present a feedback-based implementation of FS that incurs little overhead in practice. Simulation results show that, FS improves performance over previously proposed Vantage and Prism by up to 6.0% and 13.7%, respectively.
  • Keywords
    cache storage; microprocessor chips; multiprocessing systems; performance evaluation; LFU; LRU; PriSM; Vantage; associativity degradation; destructive interference; feedback-based implementation; futility scaling; high-associativity cache partitioning; many-core CMP; replacement-based cache partitioning scheme; resource efficiency; system performance; Aerospace electronics; Benchmark testing; Degradation; Optimized production technology; Partitioning algorithms; Quality of service; Resource management;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microarchitecture (MICRO), 2014 47th Annual IEEE/ACM International Symposium on
  • Conference_Location
    Cambridge
  • ISSN
    1072-4451
  • Type

    conf

  • DOI
    10.1109/MICRO.2014.46
  • Filename
    7011401